1. Field of the Invention
The present invention generally relates to a semiconductor device and particularly relates to a manufacturing method of a semiconductor device that is packaged with a fine-structured interposer that is fabricated using a silicon substrate.
2. Description of the Related Art
In a semiconductor device of the above-described type, semiconductor chips are mounted on an interposer. Accordingly, along with recent developments in semiconductor chips having finer and thinner structures, efforts are being made to provide interposers (wiring substrates or rearranging substrates) having finer and thinner structures. Interposers are normally made by forming a stack of insulating layers and conductive layers that serve as interconnections.
Recently, it has been proposed to fabricate interposers using a fine-machining technique such as a photolithography technique used in a semiconductor Chip manufacturing device. Generally, in such an interposer manufacturing process using a photolithography technique, interconnection patterns and insulating layers are stacked on one side of a silicon substrate and lands of external connection mounting terminals are formed on the other side of the silicon substrate. The lands and the interconnection patterns which are on opposite sides of the silicon substrate are electrically connected by vias formed through the silicon substrate.
By using a silicon substrate, wiring patterns patterns and insulating layers of an interposer can be formed in a manner similar to a process of manufacturing a semiconductor chip. Therefore, there is an advantage that a fine- and multilayer-structured interposer can be formed.
According to the above-mentioned interposer manufacturing method using a silicon wafer, it is necessary to perform the steps of forming through-holes in the silicon substrate for providing vias connecting front and sides the interposer, give an insulation treatment in which SiO2 layers are formed on inner surfaces of the through-holes and filling the through-holes with plating layers. The silicon substrate has a certain thickness for sustaining sufficient strength during the interposer manufacturing process. Therefore, in order to form through-holes through such a silicon substrate and to give insulation and plating treatments on the inner surfaces of the through-holes, expensive devices are used with increased machining time. This results in an increase of manufacturing cost for interposers.
The silicon substrate itself is provided for sustaining the strength and is not necessary for the function of the interposer. However, since the thickness of the silicon substrate itself is greater than the thicknesses of the wiring patterns and the insulation layers, an overall thickness of the interposer becomes comparatively great due to the thickness of the silicon substrate.
Further, in a process step of filling the plating layers in the through-holes, it is technically difficult to prevent voids in the plating layer that may lead to lower conductivity and reduced reliability.
Further, since the silicon substrate is very thin, it is difficult to handle the interposer as a single body during a manufacturing process.
Also, there is a problem with the semiconductor device in which the silicon substrate is provided with an interposer attached on one side and an insulating layer attached on the other side in that the interposer itself might warp. In such a case, it is difficult to mount LSI chips having fine-pitched electrodes onto the interposer.